LIN Fail-Safe System Basis Chip | NXP 半导体

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LIN Fail-Safe System Basis Chip

UJA1069
使用寿命终止
  • 建议不要在新设计中使用本页介绍的产品。

The UJA1069 fail-safe System Basis Chip (SBC) replaces basic discrete components which are common in every Electronic Control Unit (ECU) with a Local Interconnect Network (LIN) interface. The fail-safe SBC supports all networking applications which control various power and sensor peripherals by using LIN as a local sub-bus. The fail-safe SBC contains the following integrated devices:

  • LIN transceiver compliant with LIN 2.0 and SAE J2602, and compatible with LIN 1.3
  • Advanced independent watchdog
  • Dedicated voltage regulator for microcontroller
  • Serial peripheral interface (full duplex)
  • Local wake-up input port
  • Inhibit/limp-home output port

In addition to the advantages of integrating these common ECU functions in a single package, the fail-safe SBC offers an intelligent combination of system-specific functions such as:

  • Advanced low-power concept
  • Safe and controlled system start-up behavior
  • Advanced fail-safe system behavior that prevents any conceivable deadlock
  • Detailed status reporting on system and sub-system levels

The UJA1069 is designed to be used in combination with a microcontroller and a LIN controller. The fail-safe SBC ensures that the microcontroller is always started up in a defined manner. In failure situations the fail-safe SBC will maintain the microcontroller function for as long as possible, to provide full monitoring and software driven fall-back operation.

The UJA1069 is designed for 14 V single power supply architectures and for 14 V and 42 V dual power supply architectures.

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产品详情

Features

General Features

  • Supports remote flash programming via the LIN-bus

Contains a Full Set of LIN ECU Functions

  • LIN transceiver
  • Voltage regulator for the microcontroller (5.0 V)
  • Enhanced window watchdog with on-chip oscillator
  • Serial Peripheral Interface (SPI) for the microcontroller
  • ECU power management system
  • Fully integrated autonomous fail-safe system

Designed for Automotive Applications

  • Supports 14 V and 42 V architectures
  • Excellent ElectroMagnetic Compatibility (EMC) performance
  • +-8 kV ElectroStatic Discharge (ESD) protection Human Body Model (HBM) for off-board pins
  • +-4 kV ElectroStatic Discharge (ESD) protection IEC 61000-4-2 for off-board pins
  • +-60 V short-circuit proof LIN-bus pin
  • Battery and LIN-bus pins are protected against transients in accordance with ISO 7637-3
  • Very low sleep current

Available with these Specifications

  • Small 6.4 mm x 7.8 mm HTSSOP24 package with low thermal resistance
  • Small 8 mm x 11 mm HTSSOP32 package with low thermal resistance

LIN Transceiver

  • LIN 2.0 and SAE J2602 compliant LIN transceiver
  • Enhanced error signalling and reporting
  • Downward compatible with LIN 1.3 and the TJA1020

Power Management

  • Smart operating modes and power management modes
  • Cyclic wake-up capability in Standby and Sleep mode
  • Local wake-up input with cyclic supply feature
  • Remote wake-up capability via the LIN-bus
  • External voltage regulators can easily be incorporated in the power supply system (flexible and fail-safe)
  • 42 V battery related high-side switch for driving external loads such as relays and wake-up switches
  • Intelligent maskable interrupt output

Fail-Safe Features

  • Safe and predictable behavior under all conditions
  • Programmable fail-safe coded window and time-out watchdog with on-chip oscillator, guaranteeing autonomous fail-safe system supervision
  • Fail-safe coded 16-bit SPI interface for the microcontroller
  • Global enable pin for the control of safety-critical hardware
  • Rigorous error handling based on diagnostics
  • Supply failure early warning allows critical data to be stored
  • 23 bits of access-protected RAM is available e.g. for logging of cyclic problems
  • Reporting in a single SPI message; no assembly of multiple SPI frames needed
  • Limp-home output signal for activating application hardware in case system enters Fail-safe mode (e.g. for switching on warning lights)
  • Fail-safe coded activation of Software development mode and Flash mode
  • One SPI readable device type identification
  • Software-initiated system reset

Detection and Detailed Reporting of Failures

  • On-chip oscillator failure and watchdog alerts
  • Battery and voltage regulator undervoltages
  • LIN-bus failures (short-circuits)
  • TXDL and RXDL clamping situations and short-circuits
  • Clamped or open reset line
  • SPI message errors
  • Overtemperature warning

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购买/参数

2 结果

不包含 2 不推荐用于新设计

部件

展开描述

订购

计算机辅助设计模型

状态

电源电压[最小]（V）

电源电压[最大]（V）

预算报价（不含税）

器件功能

额外功能——模拟

封装类型

UJA1069TW
数据手册

使用寿命终止

5.5

33

1K @ CNY16.01

system basis chip

Sleep Mode, Standby Mode

HTSSOP32

UJA1069TW24
数据手册

使用寿命终止

5.5

33

—

system basis chip

Sleep Mode, Standby Mode

HTSSOP24

N true 0 PSPUJA1069zh 4 培训资料 Training Presentation t878 1 封装信息 Package Information t790 2 数据手册 Data Sheet t520 1 zh zh zh 数据手册 Data Sheet 1 1 4.0 English 1442058565192692657861 PSP 300.1 KB None None documents None 1442058565192692657861 /docs/en/data-sheet/UJA1069.pdf 300056 /docs/en/data-sheet/UJA1069.pdf UJA1069 documents N N 2011-07-03 LIN fail-safe system basis chip /docs/en/data-sheet/UJA1069.pdf /docs/en/data-sheet/UJA1069.pdf Data Sheet N 980000996212993340 2022-12-07 pdf N en Oct 28, 2009 980000996212993340 Data Sheet Y N LIN fail-safe system basis chip 封装信息 Package Information 2 2 1.0 English 1455079506654742858482 PSP 388.6 KB None None documents None 1455079506654742858482 /docs/en/package-information/SOT549-1.pdf 388627 /docs/en/package-information/SOT549-1.pdf SOT549-1 documents N N 2016-02-12 plastic thermal enhanced thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die pad /docs/en/package-information/SOT549-1.pdf /docs/en/package-information/SOT549-1.pdf Package Information N 302435339416912908 2024-01-23 pdf N en Feb 8, 2016 302435339416912908 Package Information Y N plastic thermal enhanced thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die pad 3 1.0 English 1455079622798716704795 PSP 343.1 KB None None documents None 1455079622798716704795 /docs/en/package-information/SOT864-1.pdf 343104 /docs/en/package-information/SOT864-1.pdf SOT864-1 documents N N 2016-02-12 plastic thermal enhanced thin shrink small outline package; 24 leads; body width 4.4 mm; lead pitch 0.65 mm; exposed die pad /docs/en/package-information/SOT864-1.pdf /docs/en/package-information/SOT864-1.pdf Package Information N 302435339416912908 2024-01-23 pdf N en Feb 8, 2016 302435339416912908 Package Information Y N plastic thermal enhanced thin shrink small outline package; 24 leads; body width 4.4 mm; lead pitch 0.65 mm; exposed die pad 培训资料 Training Presentation 1 4 2.9 English Application Hints Fail-Safe CAN / LIN System Basis Chips 1480611588242726670867 PSP 1.3 MB None None documents None 1480611588242726670867 /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf 1298462 /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf AH0802_v2_9_UJA106x_1 documents N N 2016-12-01 Application Hints Fail-Safe CAN / LIN System Basis Chips /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf Training Presentation N 501713016990820713 2024-01-19 pdf N en Sep 30, 2010 501713016990820713 Training Presentation Y N Application Hints Fail-Safe CAN / LIN System Basis Chips false 0 UJA1069 downloads zh-Hans true 1 Y PSP Y Y 培训资料 1 /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf 2016-12-01 1480611588242726670867 PSP 4 Sep 30, 2010 Training Presentation Application Hints Fail-Safe CAN / LIN System Basis Chips None /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf English documents 1298462 None 501713016990820713 2024-01-19 N /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf Application Hints Fail-Safe CAN / LIN System Basis Chips /docs/en/supporting-information/AH0802_v2_9_UJA106x.pdf documents 501713016990820713 Training Presentation N en None Y pdf 2.9 N N Application Hints Fail-Safe CAN / LIN System Basis Chips 1.3 MB AH0802_v2_9_UJA106x_1 N 1480611588242726670867 封装信息 2 /docs/en/package-information/SOT549-1.pdf 2016-02-12 1455079506654742858482 PSP 2 Feb 8, 2016 Package Information None /docs/en/package-information/SOT549-1.pdf English documents 388627 None 302435339416912908 2024-01-23 N /docs/en/package-information/SOT549-1.pdf plastic thermal enhanced thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die pad /docs/en/package-information/SOT549-1.pdf documents 302435339416912908 Package Information N en None Y pdf 1.0 N N plastic thermal enhanced thin shrink small outline package; 32 leads; body width 6.1 mm; lead pitch 0.65 mm; exposed die pad 388.6 KB SOT549-1 N 1455079506654742858482 /docs/en/package-information/SOT864-1.pdf 2016-02-12 1455079622798716704795 PSP 3 Feb 8, 2016 Package Information None /docs/en/package-information/SOT864-1.pdf English documents 343104 None 302435339416912908 2024-01-23 N /docs/en/package-information/SOT864-1.pdf plastic thermal enhanced thin shrink small outline package; 24 leads; body width 4.4 mm; lead pitch 0.65 mm; exposed die pad /docs/en/package-information/SOT864-1.pdf documents 302435339416912908 Package Information N en None Y pdf 1.0 N N plastic thermal enhanced thin shrink small outline package; 24 leads; body width 4.4 mm; lead pitch 0.65 mm; exposed die pad 343.1 KB SOT864-1 N 1455079622798716704795 数据手册 1 /docs/en/data-sheet/UJA1069.pdf 2011-07-03 1442058565192692657861 PSP 1 Oct 28, 2009 Data Sheet None /docs/en/data-sheet/UJA1069.pdf English documents 300056 None 980000996212993340 2022-12-07 N /docs/en/data-sheet/UJA1069.pdf LIN fail-safe system basis chip /docs/en/data-sheet/UJA1069.pdf documents 980000996212993340 Data Sheet N en None Y pdf 4.0 N N LIN fail-safe system basis chip 300.1 KB UJA1069 N 1442058565192692657861 true Y Products

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