MC33912BAC 产品信息|NXP

特点


System Basis Chip, LIN, 2x 5.0V/60&20mA LDOs, DC Motor Predriver, Isense, QFP 32

封装


LQFP32: LQFP32, plastic, low profile quad flat package; 32 terminals; 0.8 mm pitch; 7 mm x 7 mm x 1.4 mm body

购买选项

工作特点

参数
Additional Features - Analog
Low Voltage Detection Reset, PWM Capable, Wake, Watchdog Timer
Device Function
comm transceivers, linear regulators, system basis chip
Data Rate [max] kbps
20.0
Additional Features - Power Management
Low Voltage Detection Reset, PWM Capable, Wake, Watchdog Timer
Interface and Input Control
SPI / SPI
Protection
overcurrent, overtemperature, overvoltage, thermal shutdown, undervoltage detection
Additional Features - Security
SPI
Num. of Linear/LDO Regulators
2
参数
Memory / Peripheral Protection
Low Voltage Detection Reset, PWM Capable, Wake, Watchdog Timer
Diagnostics
SPI
Supply Voltage [Min to Max] (V)
5.5 to 18
Ambient Operating Temperature (Min to Max) (℃)
-40 to 125
Topology
2
Output Voltage (V)
5
Output Current (A)
0.05
Security Features
Low Voltage Detection Reset, PWM Capable, Wake, Watchdog Timer

环境

部件/12NC无铅欧盟 RoHS无卤素RHF指标二级互连REACH SVHC重量(mg)
MC33912BAC(935313412557)
Yes
Yes
Certificate Of Analysis (CoA)
Yes
D
e4
REACH SVHC
188.6
MC33912BACR2(935313412528)
Yes
Yes
Certificate Of Analysis (CoA)
Yes
D
e4
REACH SVHC
188.6

质量

部件/12NC安全保障功能安全湿度灵敏度等级(MSL)封装体峰值温度(PPT)(C°)Maximum Time at Peak Temperatures (s)
无铅焊接无铅焊接无铅焊接
MC33912BAC
(935313412557)
No
3
260
40
MC33912BACR2
(935313412528)
No
3
260
40

配送

部件/12NC协调关税 (美国)免责声明出口控制分类编号 (美国)
MC33912BAC
(935313412557)
854239
EAR99
MC33912BACR2
(935313412528)
854239
EAR99

产品变更通知

部件/12NC发行日期生效日期产品更改通知标题
MC33912BAC
(935313412557)
2020-12-152020-12-16202011011INXP Will Add a Sealed Date to the Product Label
MC33912BACR2
(935313412528)

更多信息 MC33912

The 33912 is a Serial Peripheral Interface (SPI) -controlled System Basis Chip (SBC), combining many frequently used functions in an MCU-based system, plus a Local Interconnect Network (LIN) transceiver. The 33912 has a 5.0V - 50mA low dropout regulator with full protection and reporting features. The device provides full SPI-readable diagnostics and a selectable timing watchdog for detecting errant operation. The LIN Protocol Specification 2.0 and 2.1 ('G5AC) compliant LIN transceiver has waveshaping circuitry that can be disabled for higher data rates.
Two 60mA high side switches and two 160mA low side switches with output protection are available for driving resistive and inductive loads. All outputs can be pulse-width modulated (PWM). Four high voltage inputs are available for use in contact monitoring, or as external wake-up inputs. These inputs can be used as high voltage Analog Inputs. The voltage on these pins is divided by a selectable ratio and available via an analog multiplexer.
The 33912 has three main operating modes: Normal (all functions available), Sleep (VDD off, wake-up via LIN, wake-up inputs (L1-L4), cyclic sense and forced wake-up), and Stop (VDD on with limited current capability, wake-up via CS, LIN bus, wake-up inputs, cyclic sense, forced wake-up and external reset).
The 33912 is compatible with LIN Protocol Specification 2.0, 2.1 ('G5AC) and SAEJ2602-2 ('G5AC).

更多