MC33689DPEW 产品信息|NXP

特点


System Basis Chip, LIN, 3x 5.0V/50mA LDOs, SOIC 32

封装


SSOP32: SSOP32, plastic, shrink small outline package; 32 terminals; 0.65 mm pitch; 7.5 mm x 11 mm x 2.5 mm body

购买选项

MC33689DPEW

正常供应

12NC: 935310521574

详细信息

订购

从分销商处购买

MC33689DPEWR2

正常供应

12NC: 935310521518

详细信息

订购

从分销商处购买

工作特点

参数
Additional Features - Analog
Enable, Enable Input, Inhibit, Interrupt Output, Reset, Sleep Mode, Stop Mode, Wake, Watchdog
Device Function
comm transceivers, linear regulators, system basis chip
Data Rate [max] kbps
20.0
Interface and Input Control
SPI / SPI
Protection
overcurrent protected bus, overtemperature, undervoltage
Additional Features - Security
SPI
Num. of Linear/LDO Regulators
3
参数
Diagnostics
SPI
Supply Voltage [Min to Max] (V)
5.5 to 27
Ambient Operating Temperature (Min to Max) (℃)
-40 to 125
Topology
3
Output Voltage (V)
5
Output Current (A)
0.05

环境

部件/12NC无铅欧盟 RoHS无卤素RHF指标二级互连REACH SVHC重量(mg)
MC33689DPEW(935310521574)
Yes
Yes
Certificate Of Analysis (CoA)
Yes
D
e3
REACH SVHC
510.0
MC33689DPEWR2(935310521518)
Yes
Yes
Certificate Of Analysis (CoA)
Yes
D
e3
REACH SVHC
510.0

质量

部件/12NC安全保障功能安全湿度灵敏度等级(MSL)封装体峰值温度(PPT)(C°)Maximum Time at Peak Temperatures (s)
无铅焊接无铅焊接无铅焊接
MC33689DPEW
(935310521574)
No
3
260
40
MC33689DPEWR2
(935310521518)
No
3
260
40

配送

部件/12NC协调关税 (美国)免责声明出口控制分类编号 (美国)脚印OrCAD Capture符号
MC33689DPEW
(935310521574)
854239
EAR99
 PDF | Cadence Allegro(dra) PDF | Orcad Capture 16.3(olb)
MC33689DPEWR2
(935310521518)
854239
EAR99
 PDF | Cadence Allegro(dra) PDF | Orcad Capture 16.3(olb)

产品变更通知

部件/12NC发行日期生效日期产品更改通知标题
MC33689DPEW
(935310521574)
2020-12-152020-12-16202011011INXP Will Add a Sealed Date to the Product Label
MC33689DPEWR2
(935310521518)

更多信息 MC33689

The NXP® MC33689 is a serial peripheral interface (SPI) controlled system basis chip that combines frequently used functions in an MCU-based system with a LIN transceiver. Applications include power window, mirror, and seat controls.

  • 5.0 V, 50 mA low dropout regulator with full protection and reporting features
  • Full SPI readable diagnostics and a selectable timing watchdog for detecting errant operation
  • Three operational modes: Normal (all functions available), Sleep (VDD OFF, wake-up via LIN bus or wake-up inputs), and Stop (VDD ON, wake-up via MCU, LIN bus, or wake-up inputs)