Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
12NC: 935290063518
详细信息
数量
单价
1 - 24 | $1.36 |
25 - 99 | $1.36 |
100+ | $1.36 |
订购
Normally ships in 1-2 business days.
从分销商处购买参数 | 值 |
---|---|
Type Classification | LCD Segment Drivers |
Max number of elements | 160 |
Segments/elements of MUX 1:1 | 40 |
Segments/elements of MUX 1:2 | 80 |
Segments/elements of MUX 1:3 | 120 |
Segments/elements of MUX 1:4 | 160 |
I2C-bus | Y |
参数 | 值 |
---|---|
VDD1 [min] (V) | 1.8 |
VDD1 [max] (V) | 5.5 |
VLCD [min] (V) | 2.5 |
VLCD [max] (V) | 6.5 |
ffr | 77.0 |
Cascade for larger conf | Y |
部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | REACH SVHC | 重量(mg) |
---|---|---|---|---|---|---|
PCF85176H/1,518(935290063518) | Yes | Yes Certificate Of Analysis (CoA) | Yes | REACH SVHC | 263.9 |
部件/12NC | 安全保障功能安全 | 湿度灵敏度等级(MSL) | 封装体峰值温度(PPT)(C°) | 适合 | MTBF | ||
---|---|---|---|---|---|---|---|
铅焊接 | 无铅焊接 | 铅焊接 | 无铅焊接 | ||||
PCF85176H/1,518 (935290063518) | No | 2 | 2 | 240 | 260 | 5 | 2.0E8 |
部件/12NC | 协调关税 (美国)免责声明 |
---|---|
PCF85176H/1,518 (935290063518) | 854239 |
部件/12NC | 发行日期 | 生效日期 | 产品更改通知 | 标题 |
---|---|---|---|---|
PCF85176H/1,518 (935290063518) | 2021-03-18 | 2021-06-10 | 202102020I | Standardization Packing Method for (H)LQFP in Reels |
PCF85176H/1,518 (935290063518) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
The PCF85176 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 40 segments. It can be easily cascaded for larger LCD applications. The PCF85176 is compatible with most microcontrollers and communicates via the two-line bidirectional I²C-bus. Communication overheads are minimized by a display RAM with auto-incremented addressing, by hardware subaddressing, and by display memory switching (static and duplex drive modes).