Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
封装
TSSOP16: plastic, thin shrink small outline package; 16 leads; 0.65 mm pitch, 5 mm x 4.4 mm x 1.1 mm body
购买选项
NVT2006PW,118
使用寿命终止
12NC: 935292074118
详细信息
订购
工作特点
| 参数 | 值 |
|---|---|
Signal Application | Open-drain, Push-pull signals |
Type VLT | BiDirectional FET |
Number of bits | 6 |
VCC(A) (Min - Max) | 1 to 3.6 |
VCC(B) (Min-Max) | 1.8 to 5.5 |
| 参数 | 值 |
|---|---|
Bandwidth (Max) (MHz) | 33 |
Input Type (TTL, CMOS, Schmitt Trigger) | CMOS |
Output Type (Open Drain, 3-State, Push-Pull, Pass-gate) | 3-State, Pass-gate |
Ambient Operating Temperature (Min to Max) (℃) | -40 to 85 |
AEC-Q100 compliant | N |
环境
| 部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | REACH SVHC | 重量（mg） |
|---|---|---|---|---|---|---|
NVT2006PW,118(935292074118) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC | 60.650684000000005 |
质量
| 部件/12NC | 安全保障功能安全 | 湿度灵敏度等级(MSL) | 封装体峰值温度（PPT）（C°） | 适合 | MTBF | IR | ||
|---|---|---|---|---|---|---|---|---|
| 铅焊接 | 无铅焊接 | 铅焊接 | 无铅焊接 | |||||
NVT2006PW,118 (935292074118) | No | 1 | 1 | 240 | 260 | 2.0 | 5.0E8 | 0.0 |
配送
| 部件/12NC | 协调关税 (美国)免责声明 |
|---|---|
NVT2006PW,118 (935292074118) | 854239 |
停产和更换部件数据
| 部件/12NC | 停产通知 | 上次购买日期 | 上次发货日期 | 替代器件 |
|---|---|---|---|---|
NVT2006PW,118 (935292074118) | NOTICE | 2025-09-16 | 2026-03-16 | NVT2002TLH (935291166125) |
产品变更通知
| 部件/12NC | 发行日期 | 生效日期 | 产品更改通知 | 标题 |
|---|---|---|---|---|
NVT2006PW,118 (935292074118) | 2024-12-16 | 2024-12-17 | 202409029DN | Discontinuation Notification Due to Low Volume for Numerous HPA Products |
更多信息 NVT2003_06
The NVT2003/06 is a family of bidirectional voltage level translators operational from 1.0 V to 3.6 V (Vref(A)) and 1.8 V to 5.5 V (Vref(B)), which allow bidirectional voltage translations between 1.0 V and 5 V without the need for a direction pin in open-drain or push-pull applications. Bit widths ranging from 3-bit to 6-bit are offered for level translation application with transmission speeds < 33 MHz for an open-drain system with a 50 pF capacitance and a pull-up of 197 Ω.
When the An or Bn port is LOW, the clamp is in the ON-state and a low resistance connection exists between the An and Bn ports. The low ON-state resistance (Ron) of the switch allows connections to be made with minimal propagation delay. Assuming the higher voltage is on the Bn port when the Bn port is HIGH, the voltage on the An port is limited to the voltage set by VREFA. When the An port is HIGH, the Bn port is pulled to the drain pull-up supply voltage (Vpu(D)) by the pull-up resistors. This functionality allows a seamless translation between higher and lower voltages selected by the user without the need for directional control.
When EN is HIGH, the translator switch is on, and the An I/O are connected to the Bn I/O, respectively, allowing bidirectional data flow between ports. When EN is LOW, the translator switch is off, and a high-impedance state exists between ports. The EN input circuit is designed to be supplied by Vref(B). To ensure the high-impedance state during power-up or power-down, EN must be LOW.
All channels have the same electrical characteristics and there is minimal deviation from one output to another in voltage or propagation delay. This is a benefit over discrete transistor voltage translation solutions, since the fabrication of the switch is symmetrical. The translator provides excellent ESD protection to lower voltage devices, and at the same time protects less ESD-resistant devices.