Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
购买选项
PCF85133U/2DA/1Z
正常供应
12NC: 935288104033
详细信息
订购
PCF85133U/2DA/1,02
停产
12NC: 935288104026
详细信息
订购
PCF85133U/2DB/1KP
停产
12NC: 935288522026
详细信息
订购
工作特点
| 参数 | 值 |
|---|---|
Type Classification | LCD Segment Drivers |
Max number of elements | 320 |
Segments/elements of MUX 1:1 | 80 |
Segments/elements of MUX 1:2 | 160 |
Segments/elements of MUX 1:3 | 240 |
Segments/elements of MUX 1:4 | 320 |
I2C-bus | Y |
VDD1 [min] (V) | 1.8 |
| 参数 | 值 |
|---|---|
VDD1 [max] (V) | 5.5 |
VLCD [min] (V) | 2.5 |
VLCD [max] (V) | 6.5 |
ffr | 150.0 |
Selectable | SEL |
Cascade for larger conf | Y |
Failures in time | 5 |
Mean time between failures | 200000000 |
环境
| 部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | REACH SVHC | 重量（mg） |
|---|---|---|---|---|---|---|
PCF85133U/2DA/1,02(935288104026) | Yes | Yes | Yes |  | REACH SVHC | 3.93 |
PCF85133U/2DA/1Z(935288104033) | Yes | Yes Certificate Of Analysis (CoA) | Yes | | REACH SVHC | 3.934 |
PCF85133U/2DB/1KP(935288522026) | Yes | Yes | No |  | REACH SVHC | 3.93 |
质量
| 部件/12NC | 安全保障功能安全 | 适合 | MTBF |
|---|---|---|---|
PCF85133U/2DA/1,02 (935288104026) | No | 5 | 2.0E8 |
PCF85133U/2DA/1Z (935288104033) | No | 5 | 2.0E8 |
PCF85133U/2DB/1KP (935288522026) | No | 5 | 2.0E8 |
配送
| 部件/12NC | 协调关税 (美国)免责声明 |
|---|---|
PCF85133U/2DA/1,02 (935288104026) | 854239 |
PCF85133U/2DA/1Z (935288104033) | 854239 |
PCF85133U/2DB/1KP (935288522026) | 854239 |
停产和更换部件数据
| 部件/12NC | 停产通知 | 替代器件 |
|---|---|---|
PCF85133U/2DA/1,02 (935288104026) | - | PCF85133U/2DA/1Z (935288104033) |
更多信息 PCF85133U
The PCF85133 is a peripheral device which interfaces to almost any Liquid Crystal Display (LCD) with low multiplex rates. It generates the drive signals for any static or multiplexed LCD containing up to four backplanes and up to 80 segments and can easily be cascaded for larger LCD applications. The PCF85133 is compatible with most microcontrollers and communicates via the two-line bidirectional I²C-bus. Communication overheads are minimized by a display RAM with auto-incremental addressing, by hardware subaddressing and by display memory switching (static and duplex drive modes).