Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
QorIQ Qonverge SoC, 6x1.2GHz Starcore DSP, 4x1.6GHz e6500 CPU, MAPLE-B3 accelerator, 0-105C
12NC: 935318097557
详细信息
订购
12NC: 935318098557
详细信息
订购
参数 | 值 |
---|---|
Core Type | SC3900, e6500 |
Core: Number of cores (SPEC) | 5, 5 |
Operating Frequency [Max] (MHz) | 1600 |
Cache (KB) | 32 |
参数 | 值 |
---|---|
L2 Cache (Max) (KB) | 8192 |
Ethernet Type | 2.5GBaseT, SGMII |
Ambient Operating Temperature (Min to Max) (℃) | 0 to 105 |
部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | 二级互连 | REACH SVHC | 重量(mg) |
---|---|---|---|---|---|---|---|
B4860NSN7QUMD(935318097557) | Yes | Yes Certificate Of Analysis (CoA) | Yes | e1 | REACH SVHC | 7097.3 | |
G4860NSN7QUMD(935318098557) | Yes | Yes Certificate Of Analysis (CoA) | Yes | e1 | REACH SVHC | 7097.3 |
部件/12NC | 安全保障功能安全 | 湿度灵敏度等级(MSL) | 封装体峰值温度(PPT)(C°) | Maximum Time at Peak Temperatures (s) | |||
---|---|---|---|---|---|---|---|
无铅焊接 | 无铅焊接 | 无铅焊接 | |||||
B4860NSN7QUMD (935318097557) | No | 3 | 250 | 30 | |||
G4860NSN7QUMD (935318098557) | No | 3 | 250 | 30 |
部件/12NC | 协调关税 (美国)免责声明 | 出口控制分类编号 (美国) |
---|---|---|
B4860NSN7QUMD (935318097557) | 854231 | 3A991A1 |
G4860NSN7QUMD (935318098557) | 854231 | 3A991A1 |
部件/12NC | 发行日期 | 生效日期 | 产品更改通知 | 标题 |
---|---|---|---|---|
B4860NSN7QUMD (935318097557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
G4860NSN7QUMD (935318098557) |
The QorIQ® Qonverge B4860 system-on-chip is designed for next-generation, multi-standard wireless base stations. Based on 28 nm process technology, the B4860 offers unequaled throughput and capacity and integrates a compelling blend of efficient and high-performance programmable cores, as well as application-specific accelerators to deliver optimal power and cost. It targets macrocell base station designs for broadband wireless infrastructure and builds upon the proven success of our multicore CPUs and DSPs in wireless infrastructure markets.
The B4860 combines four 64-bit, dual-threaded e6500 cores built on Power Architecture® technology, six StarCore® SC3900FP Fixed/Floating-Point DSP cores and MAPLE-B baseband acceleration processing engines. It is designed to adapt to the rapidly changing and expanding standards of LTE (FDD and TDD), LTE-Advanced including 3GPP LTE Rel.10/11 and WCDMA, and supports different standards simultaneously.