32-bit Arm® Cortex®-M4/M0 MCU; 1 MB flash and 136 kB SRAM; Ethernet, 2 x USB, EMC, AES engine
The LPC43S37JET100 is a Arm Cortex-M4 based microcontroller for embedded applications which includes an Arm Cortex-M0 coprocessor, 1 MB of flash and 136 kB of on-chip SRAM, 16 kB of EEPROM memory, security features with AES engine, a quad SPI Flash Interface (SPIFI), advanced configurable peripherals such as the State Configurable Timer (SCT) and the Serial General Purpose I/O (SGPIO) interface, two High-speed USB controllers, Ethernet, an external memory controller, and multiple digital and analog peripherals. The LPC43S37JET100 operates at CPU frequencies of up to 204 MHz.
The Arm Cortex-M4 is a 32-bit core that offers system enhancements such as low power consumption, enhanced debug features, and a high level of support block integration. The Arm Cortex-M4 CPU incorporates a 3-stage pipeline, uses a Harvard architecture with separate local instruction and data buses as well as a third bus for peripherals, and includes an internal prefetch unit that supports speculative branching. The Arm Cortex-M4 supports single-cycle digital signal processing and SIMD instructions. A hardware floating-point unit is integrated in the core. The Arm Cortex-M4 with floating-point unit is often referred to as M4F.
The Arm Cortex-M0 coprocessor is an energy-efficient and easy-to-use 32-bit core which is upward code- and tool-compatible with the Cortex-M4 core. The Cortex-M0 coprocessor, designed as a replacement for existing 8/16-bit microcontrollers, offers up to 204 MHz performance with a simple instruction set and reduced code size.
sot926-1_3d
产品详情
特征
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Cortex-M4 Processor core
- Arm Cortex-M4 processor (version r0p1), running at frequencies of up to 204 MHz.
- Built-in Memory Protection Unit (MPU) supporting eight regions.
- Built-in Nested Vectored Interrupt Controller (NVIC).
- Hardware floating-point unit.
- Non-maskable Interrupt (NMI) input.
- JTAG and Serial Wire Debug (SWD), serial trace, eight breakpoints, and four watch points.
- Enhanced Trace Module (ETM) and Enhanced Trace Buffer (ETB) support.
- System tick timer.
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Cortex-M0 Processor core
- Arm Cortex-M0 coprocessor (version r0p0) capable of off-loading the main Arm Cortex-M4 application processor.
- Running at frequencies of up to 204 MHz.
- JTAG
- Built-in NVIC.
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On-chip memory
- 1 MB on-chip dual bank flash memory with flash accelerator.
- 16 kB on-chip EEPROM data memory.
- 136 kB SRAM for code and data use.
- Multiple SRAM blocks with separate bus access. Two SRAM blocks can be powered down individually.
- 64 kB ROM containing boot code and on-chip software drivers.
- 64 bit of One-Time Programmable (OTP) memory for general-purpose use.
- Two banks (256 bit total) One-Time Programmable (OTP) memory for AES key storage. One bank can store an encrypted key for decoding the boot image.
- AES engine for encryption and decryption of the boot image and data with DMA support and programmable via a ROM-based API.
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Configurable digital peripherals
- Serial GPIO (SGPIO) interface.
- State Configurable Timer (SCT) subsystem on AHB.
- Global Input Multiplexer Array (GIMA) allows to cross-connect multiple inputs and outputs to event driven peripherals like the timers, SCT, and ADC0/1.
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Serial interfaces
- Quad SPI Flash Interface (SPIFI) with four lanes and up to 52 MB per second.
- 10/100T Ethernet MAC with RMII and MII interfaces and DMA support for high throughput at low CPU load. Support for IEEE 1588 time stamping/advanced time stamping (IEEE 1588-2008 v2).
- One High-speed USB 2.0 Host/Device interface with DMA support, on-chip full-speed PHY and ULPI interface to external high-speed PHY
- USB interface electrical test software included in ROM USB stack.
- One 550 UART with DMA support and full modem interface.
- Three 550 USARTs with DMA and synchronous mode support and a smart card interface conforming to ISO7816 specification. One USART with IrDA interface.
- Up to two C_CAN 2.0B controllers with one channel each.
- Two SSP controllers with FIFO and multi-protocol support. Both SSPs with DMA support.
- One SPI controller.
- One Fast-mode Plus I²C-bus interface with monitor mode and with open-drain I/O pins conforming to the full I²C-bus specification. Supports data rates of up to 1 Mbit/s.
- One standard I²C-bus interface with monitor mode and with standard I/O pins.
- Two I²S interfaces, each with DMA support and with one input and one output.
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Digital peripherals
- External Memory Controller (EMC) supporting external SRAM, ROM, NOR flash, and SDRAM devices.
- Secure Digital Input Output (SD/MMC) card interface.
- Eight-channel General-Purpose DMA controller can access all memories on the AHB and all DMA-capable AHB followers.
- Up to 49 General-Purpose Input/Output (GPIO) pins with configurable pull-up/pull-down resistors.
- GPIO registers are located on the AHB for fast access. GPIO ports have DMA support.
- Up to eight GPIO pins can be selected from all GPIO pins as edge and level sensitive interrupt sources.
- Two GPIO group interrupt modules enable an interrupt based on a programmable pattern of input states of a group of GPIO pins.
- Four general-purpose timer/counters with capture and match capabilities.
- Repetitive Interrupt timer (RI timer).
- Windowed watchdog timer (WWDT).
- Ultra-low power Real-Time Clock (RTC) on separate power domain with 256 bytes of battery powered backup registers.
- Alarm timer; can be battery powered.
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Analog peripherals
- One 10-bit DAC with DMA support and a data conversion rate of 400 kSamples/s.
- Two 10-bit ADCs with DMA support and a data conversion rate of 400 kSamples/s. Up to eight input channels per ADC.
- Unique ID for each device.
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Clock generation unit
- Crystal oscillator with an operating range of 1 MHz to 25 MHz.
- 12 MHz internal RC oscillator trimmed to 3 % accuracy over temperature and voltage (1.5 % accuracy for Tamb = 0 °C to 85 °C).
- Ultra-low power Real-Time Clock (RTC) crystal oscillator.
- Three PLLs allow CPU operation up to the maximum CPU rate without the need for a high-frequency crystal. The second PLL can be used with the High-speed USB, the third PLL can be used as audio PLL.
- Clock output.
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Power
- Single 3.3 V (2.4 V to 3.6 V) power supply with on-chip DC-to-DC converter for the core supply and the RTC power domain.
- RTC power domain can be powered separately by a 3 V battery supply.
- Four reduced power modes: Sleep, Deep-sleep, Power-down, and Deep power-down.
- Processor wake-up from Sleep mode via wake-up interrupts from various peripherals.
- Wake-up from Deep-sleep, Power-down, and Deep power-down modes via external interrupts and interrupts generated by battery powered blocks in the RTC power domain.
- Brownout detect with four separate thresholds for interrupt and forced reset.
- Power-On Reset (POR).
- Available as TFBGA100 package.
Target Applications
- Secure industrial gateways
- Automotive aftermarket, including telematics
- Smart meters
- Industrial controls
- Industrial automation
- Diagnostic equipment
- White goods HMI
- Data collectors and navigation
- Electronic instruments
购买/参数
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设计资源
硬件
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板类型.
1-5 / 6 硬件
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仿真器、探测器、编程器Universal Multilink FX高速开发接口
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评估板和开发板LPCXpresso43S67开发板
软件
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5 软件文件
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BSP及设备驱动
LPC SPIFI外设
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调试及视觉化工具
USB certification software for LPC4357
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可访问其他软件。 查看我们的精选合作伙伴解决方案.
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调试及视觉化工具
LPCScrypt v1.8.0
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开发IDE和生成工具
MCUXpresso集成开发环境（IDE）
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工程服务
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3 工程服务
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独立设计公司(IDH)
Embedded Software Development Services
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Firmware Development
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