Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
购买选项
P87C54X2FA,512
停产
12NC: 935270160512
详细信息
订购
P87C54X2FA,529
停产
12NC: 935270160529
详细信息
订购
工作特点
| 参数 | 值 |
|---|---|
Security Status | COMPANY PUBLIC |
Description | 80C51 8-bit microcontroller family |
Number of pins | 44 |
| 参数 | 值 |
|---|---|
Package Style | PLCC |
Product category | 230-OTP/ROM- |
环境
| 部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | REACH SVHC |
|---|---|---|---|---|---|
P87C54X2FA,512(935270160512) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | REACH SVHC |
P87C54X2FA,529(935270160529) | No | No | - | REACH SVHC |
质量
| 部件/12NC | 安全保障功能安全 | 湿度灵敏度等级(MSL) | 封装体峰值温度（PPT）（C°） | 适合 | MTBF | IR | ||
|---|---|---|---|---|---|---|---|---|
| 铅焊接 | 无铅焊接 | 铅焊接 | 无铅焊接 | |||||
P87C54X2FA,512 (935270160512) | No | 3 | 3 | 225 | 245 | 2.84 | 2.58397932816537E8 | 0.0 |
P87C54X2FA,529 (935270160529) | - | - | - | - | - | 2.84 | 2.58397932816537E8 | 0.0 |
配送
| 部件/12NC | 协调关税 (美国)免责声明 |
|---|---|
P87C54X2FA,512 (935270160512) | 854231 |
P87C54X2FA,529 (935270160529) | 854231 |
停产和更换部件数据
| 部件/12NC | 停产通知 | 上次购买日期 | 上次发货日期 | 替代器件 |
|---|---|---|---|---|
P87C54X2FA,512 (935270160512) | - | 2004-12-31 | 2004-12-31 | None |
P87C54X2FA,529 (935270160529) | - | 2012-03-31 | 2012-06-30 | None |
产品变更通知
| 部件/12NC | 发行日期 | 生效日期 | 产品更改通知 | 标题 |
|---|---|---|---|---|
P87C54X2FA,512 (935270160512) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
更多信息 P87C54X2FA
The Philips microcontrollers described in this data sheet are high-performance static 80C51 designs incorporating Philips? high-density CMOS technology with operation from 2.7 V to 5.5 V. They support both 6-clock and 12-clock operation.
The P8xC31X2/51X2 and P8xC32X2/52X2/54X2/58X2 contain 128 byte RAM and 256 byte RAM respectively, 32 I/O lines, three 16-bit counter/timers, a six-source, four-priority level nested interrupt structure, a serial I/O port for either multi-processor communications, I/O expansion or full duplex UART, and on-chip oscillator and clock circuits.
In addition, the devices are low power static designs which offer a wide range of operating frequencies down to zero. Two software selectable modes of power reduction ? idle mode and power-down mode ? are available. The idle mode freezes the CPU while allowing the RAM, timers, serial port, and interrupt system to continue functioning. The power-down mode saves the RAM contents but freezes the oscillator, causing all other chip functions to be inoperative. Since the design is static, the clock can be stopped without loss of user data. Then the execution can be resumed from the point the clock was stopped.