Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
LQFP64: LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body
12NC: 935392747557
详细信息
参数 | 值 |
---|---|
ADC (bits) | 16 |
ADC (Channels) | 1 |
ADC (16 bit) | 1 |
Core: Number of cores (SPEC) | 1 |
GPIO | 50 |
Free Programmable CPU | Arm Cortex-M0+ |
Supply Voltage [Min - Max] | 1.71, 3.6 |
ADC | 1 |
Operating Frequency [Max] (MHz) | 48 |
ADC COUNT CLOUD | 1 |
Frequency (Max) (kHz) | 48000 |
Supply Voltage [max] (V) | 3.6 |
Ambient Operating Temperature (Min to Max) (℃) | -40 to 105 |
Supply Voltage [min] (V) | 1.71 |
Peripherals | ADC, I²C, SPI, UART w/ ISO-7816 |
Memory Size (B) | 32000, 256000 |
Supply Voltage [Min to Max] (V) | 1.71 to 3.6 |
Peripheral Type | ADC, I²C, SPI, UART w/ ISO-7816 |
ADC (bits) | 16 |
Serial Communication | 1 x UART w/ ISO-7816, 2 x I²C, 2 x SPI |
ADC [Number, bits] | 1 x 16 |
Core Type | 1 x Arm Cortex-M0+ |
Number of pins | 64 |
Package Style | LQFP |
Peripheral Type | ADC, I²C, SPI, UART w/ ISO-7816 |
SRAM (Bytes) | 32000 |
参数 | 值 |
---|---|
eTSEC | 6 |
TDM | 6 |
I2C | 2 |
J1850 | 6 |
SLIC | 6 |
Security Status | COMPANY PUBLIC |
SPI | 2 |
Operating Voltage [Min to Max] (V) | 1.71 to 3.6 |
ADC Resolution | 16 |
Internal Memory Supported | FLASH, SRAM |
IBIZ LOADER | Arm Cortex-M0+ |
CLOUD_PROD3_NXP_CLOCK_SPEED_MAX | 48 |
Flash (kB) | 256 |
Pad supply (V) | 1.71 to 3.6 |
CLOUD_PROD2_NXP_CLOCK_SPEED_MAX | 48 |
MCU Internal User Flash (SPEC) (kByte) | 256 |
Communication protocol | ADC, I²C, SPI, UART w/ ISO-7816 |
CLOUD PROD - Operating Frequency [Max] (MHz) | 48 |
SRAM (kB) | 32 |
Core Type | Arm Cortex-M0+ |
Operating Temperature (Min-Max) (℃) | -40 to 105 |
Arm Core | Arm Cortex-M0+ |
Independent ADC Modules | 1 |
Master Interface | ADC, I²C, SPI, UART w/ ISO-7816 |
Controller Interface | ADC, I²C, SPI, UART w/ ISO-7816 |
Operating Frequency [Max] (MHz) | 48 |
部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | REACH SVHC | 重量(mg) |
---|---|---|---|---|---|---|
K32L2B31VLH0A(935392747557) | Yes | Yes Certificate Of Analysis (CoA) | Yes | REACH SVHC | 346.1214 |
部件/12NC | 安全保障功能安全 | 湿度灵敏度等级(MSL) | 封装体峰值温度(PPT)(C°) | Maximum Time at Peak Temperatures (s) | |||
---|---|---|---|---|---|---|---|
无铅焊接 | 无铅焊接 | 无铅焊接 | |||||
K32L2B31VLH0A (935392747557) | No | 3 | 260 | 40 |
部件/12NC | 协调关税 (美国)免责声明 | 出口控制分类编号 (美国) |
---|---|---|
K32L2B31VLH0A (935392747557) | 854231 | 3A991A2 |
部件/12NC | 发行日期 | 生效日期 | 产品更改通知 | 标题 |
---|---|---|---|---|
K32L2B31VLH0A (935392747557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
K32L2B31VLH0A (935392747557) | 2020-10-20 | 2020-10-21 | 202009023I | K32L2B Reference Manual & Datasheet Update To Rev3 |
The K32 L2 MCU family’s low-leakage architecture, combined with its power-optimized peripherals and security features (such as cryptographic acceleration technology, cyclic redundancy check and a true random number generator), make it ideal for consumer, industrial and IoT applications requiring a low-priced, power efficient option with longer battery life.
This family includes a low power Arm® Cortex®-M0+ core and with options scaling from 64 KB to 512 KB Flash and from 32 kB to 128 kB SRAM, the K32 L2 family offers a wide range of memory resources to fit different application tasks within a small-form factor, low power, and highly integrated design.