201912006I : i.MXRT1064 Data Sheet Rev 1 and Errata Rev 1.1 Updates

NXP Semiconductors announces errata update to revision 1.1 and data sheet update to revision 1 for i.MXRT1064. The revision history included in the updated documents provides a detailed description of the changes. Changes are summarized below.For RT1064 Chip Errata:Added following errata:* ERR050235 CCM: Incorrect clock setting for CAN affects UART clock gatingFor RT1064 Consumer DS Data Sheet Changes:1. Updated ADC and SPI NAND Flash in the Section 1.1 Features; removed DAC from Section 1.1Features2. Updated ADC and RAM in the Figure 2 "i.MX RT1064 system block diagram"3. Updated the RT website link in the Section 1.2 Ordering information4. Updated FlexSPI and SNVS in the Table 1 Ordering information; added KPP SPI XBAR/AOI CSU and second package information in the Table 1 Ordering information5. Removed tamper detection from the Table 2 i.MX RT1064 modules list6. Updated the on-chip termination values of JTAG_TCK and JTAG_MOD in the Table 4 JTAG Controller interface summary7. Updated the Section 4.1.2 Thermal resistance8. Changed 528 MHz PLL to System PLL in the Table 16 System PLL's electrical parameters9. Changed 480 MHz PLL to USB PLL in the Table 18 USB PLL's electrical parameters10.Updated the VDD name of supply voltage conditions column in the Table 54 12-bit ADC operating conditions11.Updated the Section 4.9.1 LPSPI timing parameters12.Updated the Table 82 Boot through UART1 and removed the Table Boot through UART213.Updated the Figure 53 "10 x 10 mm BGA case x package top bottom and side Views"14.Added the Section 7.2 12 x 12 mm package informationFor RT1064 Industrial DS Data Sheet Changes:1. Updated SPI NAND Flash in the Section 1.1 Features2. Updated FlexSPI LCD/CSI/PXP and SNVS in the Table 1 Ordering information; added KPP SPI XBAR/AOI and CSU in the Table 1 Ordering information3. Updated RAM in the Figure 2 "i.MX RT1064 system block diagram"4. Updated the Section 4.1.2 Thermal resistance5. Updated the Table 82 Boot through UART1 and removed the Table Boot through UART26. Updated the Figure 53 "10 x 10 mm BGA case x package top bottom and side Views" and Figure 54 "12 x 12 mm BGA case x package top bottom and side Views"The i.MXRT1064 errata revision 1.1 is attached to this notice and can be found at:https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i.mx-rt-series/i.mx-rt1064-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1064?tab=Documentation_Tab&linkline=ErrataThe i.MXRT1064 data sheet revision 1 is attached to this notice and can be found at:https://www.nxp.com/products/processors-and-microcontrollers/arm-microcontrollers/i.mx-rt-series/i.mx-rt1064-crossover-processor-with-arm-cortex-m7-core:i.MX-RT1064?tab=Documentation_Tab&linkline=Data-Sheet

变化的原因

The errata was added for additional technical clarification on some device features.The data sheets have been updated to correct errors and / or provide additional technical clarification on some device features.

受影响产品的识别

Product identification does not change

预期的影响

数据表的修订: A new datasheet will be issued

No impact on form fit function reliability or quality.

受影响的部分