Features
Battery Cell Controller, Advanced, 6 Channels, TPL, LQFP48.
Package
HLQFP48 LQFP64, plastic, low profile quad flat package; 64 terminals; 0.5 mm pitch; 10 mm x 10 mm x 1.4 mm body.
特点
QorIQ, 32-Bit Power Arch SoC, 4 X 1.2GHz, DDR3/3L, PCIe, SATA, SRIO, 1/10GbE, -40 to 105C, Rev 2
购买选项
P3041NXN7MMC
使用寿命终止
12NC: 935324702557
详细信息
订购
工作特点
| 参数 | 值 |
|---|---|
Ethernet Type | 1GBaseT, XAUI |
Core: Number of cores (SPEC) | 4 |
PCIe | 4 |
GPIO | 32 |
Ethernet Type | 1GBaseT, XAUI |
Description | QorIQ, 32-Bit Power Arch SoC, 4 X 1.2GHz, DDR3/3L, PCIe, SATA, SRIO, 1/10GbE, -40 to 105C, Rev 2 |
Free Programmable CPU | e500mc |
Operating Frequency [Max] (MHz) | 1200 |
Frequency (Max) (kHz) | 1200000 |
L3 Cache (Max) (KB) | 1000 |
Ambient Operating Temperature (Min to Max) (℃) | -40 to 105 |
External Memory Supported | DDR3 SDRAM, DDR3L SDRAM |
Peripherals | DUART, ETH, ETH, I²C, PCIe, SPI, SRIO |
Memory Size (B) | 32000, 128000, 1000000 |
Peripheral Type | DUART, ETH, ETH, I²C, PCIe, SPI, SRIO |
PCIe | 4 x PCIe |
Ethernet w/ 1588 | 2 |
Serial Communication | 1 x SPI, 4 x I²C |
Cache (B) | 32000 |
Core Type | 4 x e500mc |
Number of pins | 1295 |
Package Style | BGA |
Peripheral Type | DUART, ETH, ETH, I²C, PCIe, SPI, SRIO |
Typical Power | 13.1 |
sRIO | 2 |
eTSEC | 15 |
Cache (KB) | 32 |
DUART | 2 |
TDM | 15 |
| 参数 | 值 |
|---|---|
External Memory Interface [Number, Type] | 1000 x DDR3 SDRAM, 1000 x DDR3L SDRAM |
External Memory Interface | 1000 x DDR3 SDRAM, 1000 x DDR3L SDRAM |
I2C | 4 |
J1850 | 15 |
SLIC | 15 |
Security Status | COMPANY PUBLIC |
SPI | 1 |
Bus Frequency (typ) (MHz) | 600 |
L1 Cache (KB) | 32 |
Memory | SDRAM |
Core Type | Power Architecture has child e500, e500v2, e500mc |
Interfaces | Interfaces, Interfaces, Interfaces, Interfaces, Interfaces, Interfaces, Interfaces |
Internal Memory Supported | FLASH CACHE, L2 CACHE, L3 CACHE |
L2 Cache (Max) (KB) | 128 |
IBIZ LOADER | e500mc |
CLOUD_PROD3_NXP_CLOCK_SPEED_MAX | 1200 |
UART | 2 |
CLOUD_PROD2_NXP_CLOCK_SPEED_MAX | 1200 |
Communication protocol | DUART, ETH, I²C, PCIe, SPI, SRIO |
CLOUD PROD - Operating Frequency [Max] (MHz) | 1200 |
Core Type | e500mc |
Operating Temperature (Min-Max) (℃) | -40 to 105 |
Arm Core | e500mc |
Ethernet | 2 |
Ethernet | 1 x 1GBaseT, 1 x XAUI |
Master Interface | DUART, ETH, I²C, PCIe, SPI, SRIO |
Controller Interface | DUART, ETH, ETH, I²C, PCIe, SPI, SRIO |
Operating Frequency [Max] (MHz) | 1200 |
环境
| 部件/12NC | 无铅 | 欧盟 RoHS | 无卤素 | RHF指标 | 二级互连 | REACH SVHC | 重量（mg） |
|---|---|---|---|---|---|---|---|
P3041NXN7MMC(935324702557) | Yes | Yes Certificate Of Analysis (CoA) | Yes |  | e1 | REACH SVHC | 13973.9 |
质量
| 部件/12NC | 安全保障功能安全 | 湿度灵敏度等级(MSL) | 封装体峰值温度（PPT）（C°） | Maximum Time at Peak Temperatures (s) | |||
|---|---|---|---|---|---|---|---|
| 无铅焊接 | 无铅焊接 | 无铅焊接 | |||||
P3041NXN7MMC (935324702557) | No | 3 | 245 | 30 | |||
配送
| 部件/12NC | 协调关税 (美国)免责声明 | 出口控制分类编号 (美国) | 脚印 | OrCAD Capture符号 |
|---|---|---|---|---|
P3041NXN7MMC (935324702557) | 854231 | 3A991A1 | PDF | Cadence Allegro(dra) | PDF | Orcad Capture 16.3(olb) |
停产和更换部件数据
| 部件/12NC | 停产通知 | 上次购买日期 | 上次发货日期 | 替代器件 |
|---|---|---|---|---|
P3041NXN7MMC (935324702557) | NOTICE | 2021-09-09 | 2023-12-15 | - |
产品变更通知
| 部件/12NC | 发行日期 | 生效日期 | 产品更改通知 | 标题 |
|---|---|---|---|---|
P3041NXN7MMC (935324702557) | 2025-04-16 | 2025-05-26 | 202504008I | Freescale Logo to NXP Logo Product Marking Conversion for All Remaining Former Freescale Products |
P3041NXN7MMC (935324702557) | 2021-03-04 | 2021-03-05 | 202102034DN | Discontinuance of P1010P1020 P1022 P2020P3041 P4080 P5040 C290 MSC8156 BSC9131837x 8548 8572 8536 8544 Families |
P3041NXN7MMC (935324702557) | 2020-12-15 | 2020-12-16 | 202011011I | NXP Will Add a Sealed Date to the Product Label |
更多信息 P3041
P3041 device is "Not recommended for new designs", please use the replacement families Power Architecture (T208x), Arm Architecture (LS1046, LS2080).
The QorIQ® P3041 processor is an optimized quad-core device that leverages architectural features pioneered in the P4 platform. Built on Power Architecture® technology, the P3041 fits into many of the same applications as the P4 platform processors, yet is designed to offer a more power- and cost-efficient solution.
The P3041 includes P4 platform features such as the three-level cache hierarchy for low latencies, hardware hypervisor for robust virtualization support, data path acceleration architecture (DPAA) for offloading packet handling tasks from the core and the CoreNet® switch fabric which eliminates internal bottlenecks. This enables architectural compatibility from the P3041 to the P4 platform and also to the P5 platform, which uses the same architecture. P3041 is pin-compatible with P4040, P4080, P5010, and P5020.